Analog Devices AD9912 Manual de usuario descargar pdf (Pagina 37)

AD9912

Rev. D | Page 37 of 40

Table 38.

Bits Bit Name Description

[7:0] Spur A phase Linear offset for Spur B phase.

Table 39.

Bits Bit Name Description

[8] Spur A phase Linear offset for Spur A phase.

Table 40.

Bits Bit Name Description

7 HSR-B enable Harmonic Spur Reduction B enable.

6 Amplitude gain × 2 Setting this bit doubles the gain of the cancelling circuit and also doubles the minimum step size.

[5:4] Reserved Reserved.

[3:0] Spur B harmonic Spur B Harmonic 1 to Spur B Harmonic 15. Allows user to choose which harmonic to eliminate.

Table 41.

Bits Bit Name Description

[7:0] Spur B magnitude Linear multiplier for Spur B magnitude.

Table 42.

Bits Bit Name Description

[7:0] Spur B phase Linear offset for Spur B phase.

Table 43.

Bits Bit Name Description

8 Spur B phase Linear offset for Spur B phase.

1 2 ... 32 33 34 35 36 37 38 39 40

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Analog Devices AD9912 Manual de usuario Pagina 37